输出PS2数据流-HDLbits

要求添加数据路径，把有效的PS2的3个字节的数据输出。

module top_module(
input clk,
input [7:0] in,
input reset, // Synchronous reset
output [23:0] out_bytes,
output done); //

// FSM from fsm_ps2
parameter BYTE1=2'h0,BYTE2=2'h1,BYTE3=2'h2,DONE=2'h3;
reg [1:0]state,next_state;
reg [23:0]data;
always @(*)
begin
case(state)
BYTE1:begin
next_state=in[3]?BYTE2:BYTE1;

end
BYTE2:begin
next_state=BYTE3;

end
BYTE3:begin
next_state=DONE;

end
DONE:next_state=in[3]?BYTE2:BYTE1;
default:next_state=BYTE1;
endcase
end

always @(posedge clk)
if(reset)
state<=BYTE1;
else
state<=next_state;

assign done=state==DONE;
// New: Datapath to store incoming bytes.
always @(posedge clk)
if(reset)
data<=24'h0;
else begin
data<={data[15:0],in};
end
assign out_bytes=done?data:24'hx;
endmodule