macro

`uvm_do

`define uvm_do(SEQ_OR_ITEM) \
  `uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, -1, {})
repeat (10) begin
  `uvm_do(m_trans)
end

`uvm_do_with

`define uvm_do_with(SEQ_OR_ITEM, CONSTRAINTS) \
  `uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, -1, CONSTRAINTS)
`uvm_do_with(m_trans, {m_trans.pload.size < 500;})

`uvm_do_pri

`define uvm_do_pri(SEQ_OR_ITEM, PRIORITY) \
  `uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, PRIORITY, {})
`uvm_do_pri(m_trans, 100)

`uvm_do_pri_with

`define uvm_do_pri_with(SEQ_OR_ITEM, PRIORITY, CONSTRAINTS) \
  `uvm_do_on_pri_with(SEQ_OR_ITEM, m_sequencer, PRIORITY, CONSTRAINTS)
`uvm_do_pri_with(m_trans, 200, {m_trans.pload.size < 500;})

  

直接使用macro宏虽然方便,但不够灵活;

首先其就不能够使用randc系列变量的特性,因此,拆开来使用更好。

image

 

 
 
 
 
 
posted @ 2025-07-31 19:41  NoNounknow  阅读(16)  评论(0)    收藏  举报